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Full-Bit Functional, High-Density 8 Mbit One Transistor–One Capacitor Ferroelectric Random Access Memory Embedded within a Low-Power 130 nm Logic Process
Udayakumar, K. R., Moise, T. S., Summerfelt, S. R., Boku, K., Remack, K. A., Gertas, J., Haider, A., Obeng, Y., Martin, J. S., Rodriguez, J., Shinn, G., McKerrow, A., Eliason, J., Bailey, R., Fox, G.Volume:
46
Language:
english
Journal:
Japanese Journal of Applied Physics
DOI:
10.1143/JJAP.46.2180
Date:
April, 2007
File:
PDF, 208 KB
english, 2007