Layout techniques to enhance the radiation tolerance of...

Layout techniques to enhance the radiation tolerance of standard CMOS technologies demonstrated on a pixel detector readout chip

W. Snoeys, F. Faccio, M. Burns, M. Campbell, E. Cantatore, N. Carrer, L. Casagrande, A. Cavagnoli, C. Dachs, S. Di Liberto, F. Formenti, A. Giraldo, E.H.M. Heijne, P. Jarron, M. Letheren, A. Marchioro
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Volume:
439
Year:
2000
Language:
english
Pages:
12
DOI:
10.1016/s0168-9002(99)00899-2
File:
PDF, 531 KB
english, 2000
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