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[IEEE 2015 IEEE 2nd International Conference on Recent Trends in Information Systems (ReTIS) - Kolkata, India (2015.7.9-2015.7.11)] 2015 IEEE 2nd International Conference on Recent Trends in Information Systems (ReTIS) - An efficient hardware design of SIFT algorithm using fault tolerant reversible logic
Pal, Chandrajit, Das, Pabitra, Mandal, Sudhindu Bikash, Chakrabarti, Amlan, Basu, Samik, Ghosh, RanjanYear:
2015
Language:
english
DOI:
10.1109/ReTIS.2015.7232933
File:
PDF, 18.39 MB
english, 2015