High-Performance Buried-Gate Surrounding Gate Transistor...

Japanese Journal of Applied Physics 2004 / 10 Vol. 43; Iss. 10

High-Performance Buried-Gate Surrounding Gate Transistor for Future Three-Dimensional Devices

Iwai, Makoto, Yamamoto, Yasue, Nishi, Ryohsuke, Sakuraba, Hiroshi, Endoh, Tetsuo, Masuoka, Fujio
How much do you like this book?
What’s the quality of the file?
Download the book for quality assessment
What’s the quality of the downloaded files?
Volume:
43
Language:
english
Journal:
Japanese Journal of Applied Physics
DOI:
10.1143/JJAP.43.6904
Date:
October, 2004
File:
PDF, 197 KB
english, 2004
Conversion to is in progress
Conversion to is failed