Best Practices for Compact Modeling in Verilog-A
McAndrew, Colin C., Coram, Geoffrey J., Gullapalli, Kiran K., Jones, J. Robert, Nagel, Laurence W., Roy, Ananda S., Roychowdhury, Jaijeet, Scholten, Andries J., Smit, Geert D. J., Wang, Xufeng, YoshitVolume:
3
Language:
english
Journal:
IEEE Journal of the Electron Devices Society
DOI:
10.1109/JEDS.2015.2455342
Date:
September, 2015
File:
PDF, 1.11 MB
english, 2015