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A 6.7 MHz to 1.24 GHz $0.0318\;{\text{mm}^2}$ Fast-Locking All-Digital DLL Using Phase-Tracing Delay Unit in 90 nm CMOS
Hsieh, Min-Han, Chen, Liang-Hsin, Liu, Shen-Iuan, Chen, Charlie Chung-PingYear:
2015
Language:
english
Journal:
IEEE Journal of Solid-State Circuits
DOI:
10.1109/JSSC.2015.2494603
File:
PDF, 2.75 MB
english, 2015