[IEEE 2015 Symposium on VLSI Technology - Kyoto, Japan (2015.6.16-2015.6.18)] 2015 Symposium on VLSI Technology (VLSI Technology) - 2.8-GB/s-write and 670-MB/s-erase operations of a 3D vertical chain-cell-type phase-change-memory array
Kurotsuchi, K., Sasago, Y., Yoshitake, H., Minemura, H., Anzai, Y., Fujisaki, Y., Takahama, T., Takahashi, T., Mine, T., Shima, A., Fujisaki, K., Kobayashi, T.Year:
2015
Language:
english
DOI:
10.1109/VLSIT.2015.7223705
File:
PDF, 555 KB
english, 2015