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[IEEE 2015 Symposium on VLSI Circuits - Kyoto, Japan (2015.6.17-2015.6.19)] 2015 Symposium on VLSI Circuits (VLSI Circuits) - A 32 Gb/s 0.55 mW/Gbps PAM4 1-FIR 2-IIR tap DFE receiver in 65-nm CMOS
Elhadidy, Osama, Roshan-Zamir, Ashkan, Yang, Hae-Woong, Palermo, SamuelYear:
2015
Language:
english
DOI:
10.1109/VLSIC.2015.7231265
File:
PDF, 293 KB
english, 2015