Design Considerations for Reconfigurable Delay Circuit to...

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2015 / 11 Vol. 23; Iss. 11

Design Considerations for Reconfigurable Delay Circuit to Emulate System Critical Paths

Yuan, Xiaobin, Owczarczyk, Pawel, Drake, Alan J., Tiner, Marshall D., Hui, David T., Pennings, John P., Campisano, Francesco A., Willaman, Richard L., Cropp, Leana M., Dussault, Rudolph D.
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Volume:
23
Language:
english
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI:
10.1109/tvlsi.2014.2364785
Date:
November, 2015
File:
PDF, 1.24 MB
english, 2015
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