A high speed, memory efficient line based VLSI architecture...

Microprocessors and Microsystems 2016 / 02 Vol. 40

A high speed, memory efficient line based VLSI architecture for the dual mode inverse discrete wavelet transform of JPEG2000 decoder

Nath, Pallab Kumar, Banerjee, Swapna
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Volume:
40
Language:
english
Journal:
Microprocessors and Microsystems
DOI:
10.1016/j.micpro.2015.11.019
Date:
February, 2016
File:
PDF, 1.28 MB
english, 2016
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