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Role of Device Dimensions and Layout on the Analog Performance of Gate-First HKMG nMOS Transistors
Sivanaresh M., Satya, Duhan, Pardeep, Mohapatra, Nihar R.Volume:
62
Language:
english
Journal:
IEEE Transactions on Electron Devices
DOI:
10.1109/TED.2015.2477368
Date:
November, 2015
File:
PDF, 2.74 MB
english, 2015