Fault tolerant architecture design using...

Fault tolerant architecture design using quad-gate-transistor redundancy

Mukherjee, Atin, Dhar, Anindya Sundar
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Volume:
9
Language:
english
Journal:
IET Circuits, Devices & Systems
DOI:
10.1049/iet-cds.2014.0106
Date:
May, 2015
File:
PDF, 489 KB
english, 2015
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