[IEEE 2015 Symposium on VLSI Circuits - Kyoto, Japan (2015.6.17-2015.6.19)] 2015 Symposium on VLSI Circuits (VLSI Circuits) - A 6.4Gb/s/pin at sub-1V supply voltage TX-interleaving technique for mobile DRAM interface
Lee, Chang-Kyo, Ahn, Minsu, Moon, Daesik, Kim, Kiho, Eom, Yoon-Joo, Lee, Won-Young, Kim, Jongmin, Yoon, Sanghyuk, Choi, Baekkyu, Kwon, Seokhong, Park, Joon-Young, Bae, Seung-Jun, Bae, Yong-Cheol, ChoiYear:
2015
Language:
english
DOI:
10.1109/VLSIC.2015.7231254
File:
PDF, 888 KB
english, 2015