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Verification of Asynchronous Circuits using Timed Automata
Marius Bozga, Hou Jianmin, Oded Maler, Sergio YovineVolume:
65
Year:
2002
Language:
english
Pages:
13
DOI:
10.1016/s1571-0661(04)80468-7
File:
PDF, 162 KB
english, 2002