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Microsystem Technologies 2016 / 2

Design and power analysis of 4 × 4 semiconductor ROM array with row decoder and column decoder at 32, 22 and 16 nm channel length of MOS transistor

Bari, Surajit, Bhowmik, Sonali, De, Debashis, Sarkar, Angsuman
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Language:
english
Journal:
Microsystem Technologies
DOI:
10.1007/s00542-016-2875-6
Date:
February, 2016
File:
PDF, 1.09 MB
english, 2016
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