Errata to “Surface-Potential-Based Drain Current...

IEEE Transactions on Electron Devices 2016 / 1 Vol. 63; Iss. 1

Errata to “Surface-Potential-Based Drain Current Analytical Model for Triple-Gate Junctionless Nanowire Transistors” [Dec 12 3510-3518]

Trevisoli, Renan, Doria, Rodrigo Trevisoli, de Souza, Michelly, Das, Samaresh, Ferain, Isabelle, Pavanello, Marcelo Antonio
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Volume:
63
Language:
english
Journal:
IEEE Transactions on Electron Devices
DOI:
10.1109/TED.2015.2496962
Date:
January, 2016
File:
PDF, 75 KB
english, 2016
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