A novel reconfigurable architecture of a DSP processor for efficient mapping of DSP functions using field programmable DSP arrays
Sinha, Amitabha, Sarkar, Mitrava, Acharyya, Soumojit, Chakraborty, SuranjanVolume:
41
Language:
english
Journal:
ACM SIGARCH Computer Architecture News
DOI:
10.1145/2490302.2490304
Date:
May, 2013
File:
PDF, 972 KB
english, 2013