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An Efficient Decoder Architecture for Nonbinary LDPC Codes with Extended Min-Sum Algorithm
LIN, CHIA-LUNG, Tu, Shu-Wen, Chen, Chih-Lung, Chang, Hsie-Chia, Lee, Chen-YiYear:
2016
Language:
english
Journal:
IEEE Transactions on Circuits and Systems II: Express Briefs
DOI:
10.1109/tcsii.2016.2534820
File:
PDF, 403 KB
english, 2016