A Low-Error, Cost-Efficient Design Procedure for Evaluating...

IEEE Transactions on Computers 2016 / 4 Vol. 65; Iss. 4

A Low-Error, Cost-Efficient Design Procedure for Evaluating Logarithms to Be Used in a Logarithmic Arithmetic Processor

Liu, Chih-Wei, Ou, Shih-Hao, Chang, Kuo-Chiang, Lin, Tzung-Ching, Chen, Shin-Kai
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Volume:
65
Language:
english
Journal:
IEEE Transactions on Computers
DOI:
10.1109/tc.2015.2441696
Date:
April, 2016
File:
PDF, 1.24 MB
english, 2016
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