![](/img/cover-not-exists.png)
[IEEE 2015 IEEE CPMT Symposium Japan (ICSJ) - Kyoto, Japan (2015.11.9-2015.11.11)] 2015 IEEE CPMT Symposium Japan (ICSJ) - Electrical interconnect test method of 3D ICs without boundary scan flip flops
Hashizume, Masaki, Umezu, Shoichi, Ikiri, Yuki, Ali, Fara Ashikin Binti, Yotsuyanagi, Hiroyuki, Shyue-Kung Lu,Year:
2015
Language:
english
DOI:
10.1109/icsj.2015.7357381
File:
PDF, 545 KB
english, 2015