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[IEEE 2015 International Symposium on Computer Architecture and High Performance Computing Workshop (SBAC-PADW) - Florianopolis, Brazil (2015.10.18-2015.10.21)] 2015 International Symposium on Computer Architecture and High Performance Computing Workshop (SBAC-PADW) - Using Hardware Transactional Memory to Enable Speculative Trace Optimization
Salamanca, Juan, Amaral, Jose Nelson, Araujo, GuidoYear:
2015
Language:
english
DOI:
10.1109/sbac-padw.2015.13
File:
PDF, 673 KB
english, 2015