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[IEEE 2014 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS) - Bangalore, India (2014.12.14-2014.12.16)] 2014 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS) - Design space exploration of Through Silicon Vias for high-speed, low loss vertical links
Kumar, Somesh, Kaur, Sarabjeet, Bakshi, Mayank, Bansal, Mohit, Choudhary, Mohan, Sharma, RohitYear:
2014
Language:
english
DOI:
10.1109/edaps.2014.7030802
File:
PDF, 722 KB
english, 2014