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Efficient Hybrid Performance Modeling for Analog Circuits Using Hierarchical Shrinkage Priors
Liao, Changhai, Tao, Jun, Yu, Handi, Tang, Zhangwen, Su, Yangfeng, Zhou, Dian, Zeng, Xuan, Li, XinYear:
2016
Language:
english
Journal:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
DOI:
10.1109/tcad.2016.2543021
File:
PDF, 652 KB
english, 2016