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An FPGA based Topological Processor prototype for the ATLAS Level-1 Trigger upgrade
Bauss, B, Büscher, V, Degele, R, Ji, W, Moritz, S, Reiss, A, Schäfer, U, Simioni, E, Tapprogge, S, Wenzel, VVolume:
7
Language:
english
Journal:
Journal of Instrumentation
DOI:
10.1088/1748-0221/7/12/c12007
Date:
December, 2012
File:
PDF, 1.04 MB
english, 2012