Loop profiling tool for HPC code inspection as an efficient...

Loop profiling tool for HPC code inspection as an efficient method of FPGA based acceleration

Pietroń, Marcin, Russek, Paweł, Wiatr, Kazimierz
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Volume:
20
Language:
english
Journal:
International Journal of Applied Mathematics and Computer Science
DOI:
10.2478/v10006-010-0043-1
Date:
January, 2010
File:
PDF, 244 KB
english, 2010
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