[IEEE 2016 IEEE International Solid-State Circuits Conference (ISSCC) - San Francisco, CA, USA (2016.1.31-2016.2.4)] 2016 IEEE International Solid-State Circuits Conference (ISSCC) - 10.5 A digital PLL with feedforward multi-tone spur cancelation loop achieving −73dBc fractional spur and −110dBc Reference Spur in 65nm CMOS

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