A Study of Transistor Optimization in A 0.25 Micron CMOS Flow Using S/D and Silicide Process Modules and Their Interactions
Vasanth, K., Apte, P., Davis, J., Saxena, S., Burch, R., Rao, S., Mozumder, P. K.Volume:
514
Language:
english
Journal:
MRS Proceedings
DOI:
10.1557/proc-514-253
Date:
January, 1998
File:
PDF, 461 KB
english, 1998