A Self-Aligned Silicide Process for Thin...

MRS Proceedings 2001 / 1 Vol. 686

A Self-Aligned Silicide Process for Thin Silicon-on-Insulator MOSFETs and Bulk MOSFETs with Shallow Junctions

Cohen, G. M., Cabral, C., Lavoie, C., Solomon, P. M., Guarini, K.W., Chan, K.K., Roy, R.A.
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Volume:
686
Language:
english
Journal:
MRS Proceedings
DOI:
10.1557/proc-686-a3.3
Date:
January, 2001
File:
PDF, 435 KB
english, 2001
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