SET/RESET Cycling-Induced Trap Creation and SET-Disturb...

IEEE Transactions on Electron Devices 2016 / 6 Vol. 63; Iss. 6

SET/RESET Cycling-Induced Trap Creation and SET-Disturb Failure Time Degradation in a Resistive-Switching Memory

Chung, Yueh-Ting, Su, Po-Cheng, Lin, Wen-Jie, Chen, Min-Cheng, Wang, Tahui
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Volume:
63
Language:
english
Journal:
IEEE Transactions on Electron Devices
DOI:
10.1109/ted.2016.2555333
Date:
June, 2016
File:
PDF, 2.92 MB
english, 2016
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