![](/img/cover-not-exists.png)
[IEEE 2016 IEEE International Solid-State Circuits Conference (ISSCC) - San Francisco, CA, USA (2016.1.31-2016.2.4)] 2016 IEEE International Solid-State Circuits Conference (ISSCC) - 18.1 A 20nm 9Gb/s/pin 8Gb GDDR5 DRAM with an NBTI monitor, jitter reduction techniques and improved power distribution
Joo, Hye-Yoon, Bae, Seung-Jun, Sohn, Young-Soo, Kim, Young-Sik, Ha, Kyung-Soo, Ahn, Min-Su, Kim, Young-Ju, Kim, Yong-Jun, Kim, Young-Ju, Kim, Ju-Hwan, Choi, Won-Jun, Shin, Chang-Ho, Kim, Soo Hwan, KimYear:
2016
Language:
english
DOI:
10.1109/isscc.2016.7418033
File:
PDF, 285 KB
english, 2016