VHDL Simulation: A Flexible Approach to Verification and...

Systems Analysis Modelling Simulation 2002 / 01 Vol. 42; Iss. 6

VHDL Simulation: A Flexible Approach to Verification and Performance Analysis of Communication Protocols

Baldi, Mario, Macii, Alberto, Macii, Enrico, Poncino, Massimo
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Volume:
42
Language:
english
Journal:
Systems Analysis Modelling Simulation
DOI:
10.1080/716067196
Date:
January, 2002
File:
PDF, 283 KB
english, 2002
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