![](/img/cover-not-exists.png)
Analytical modelling of threshold voltage for underlap Fully Depleted Silicon-On-Insulator MOSFET
Sharma, Rajneesh, Rana, Ashwani K.Language:
english
Journal:
International Journal of Electronics
DOI:
10.1080/00207217.2016.1199052
Date:
June, 2016
File:
PDF, 857 KB
english, 2016