SPIE Proceedings [SPIE Microelectronic Manufacturing - Santa Clara, CA (Monday 18 September 2000)] Process Control and Diagnostics - Design and reliability aspects of multilevel metal large-scale power line layouts in ULSI-ICs
Jacob, Peter J., Nicoletti, Giovanni, Miller, Michael L., Ashtiani, Kaihan A.Volume:
4182
Year:
2000
Language:
english
DOI:
10.1117/12.410074
File:
PDF, 902 KB
english, 2000