SPIE Proceedings [SPIE SPIE Advanced Lithography - San Jose, California, United States (Sunday 21 February 2016)] Design-Process-Technology Co-optimization for Manufacturability X - Methodology to extract, data mine and score geometric constructs from physical design layouts for analysis and applications in semiconductor manufacturing
Capodieci, Luigi, Cain, Jason P., Pathak, Piyush, Krishnamoorthy, Karthik, Wang, Wei-Long, Lai, Ya-Chieh, Gennari, Frank E., Somani, Shikha, Pack, Bob, Schroeder, Uwe Paul, Batarseh, Fadi, Bravo, JaimVolume:
9781
Year:
2016
Language:
english
DOI:
10.1117/12.2220145
File:
PDF, 1.63 MB
english, 2016