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SPIE Proceedings [SPIE SPIE Advanced Lithography - San Jose, California, USA (Sunday 24 February 2008)] Design for Manufacturability through Design-Process Integration II - Implementation of silicon-validated variability analysis and optimization for standard cell libraries
Bingert, Raphael, Singh, Vivek K., Rieger, Michael L., Aurand, Alain, Marin, Jean-Claude, Balossier, Eric, Devoivre, Thierry, Trouiller, Yorick, Vautrin, Florent, Verghese, Nishath, Rouse, Richard, CoVolume:
6925
Year:
2008
Language:
english
DOI:
10.1117/12.772897
File:
PDF, 622 KB
english, 2008