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SPIE Proceedings [SPIE SPIE Advanced Lithography - San Jose, California, USA (Sunday 27 February 2011)] Design for Manufacturability through Design-Process Integration V - Extending analog design scaling to sub-wavelength lithography: co-optimization of RET and photomasks
Parikh, Ashesh, Rieger, Michael L., Dorris, Siew, Smelko, Tom, Walbrick, Walter, Mahalingam, Pushpa, Arch, John, Green, Kent, Garg, Vishal, Buck, Peter, West, CraigVolume:
7974
Year:
2011
Language:
english
DOI:
10.1117/12.877487
File:
PDF, 1015 KB
english, 2011