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SPIE Proceedings [SPIE Microtechnologies for the New Millennium 2005 - Sevilla, Spain (Monday 9 May 2005)] VLSI Circuits and Systems II - Bounded budgeted parallel architecture versus control dominated architecture for hazard data-signal processor synthesis
Le Gal, Bertrand, Casseau, Emmanuel, Martin, Eric, Lopez, Jose F., Fernandez, Francisco V., Lopez-Villegas, Jose Maria, de la Rosa, Jose M.Volume:
5837
Year:
2005
Language:
english
DOI:
10.1117/12.608318
File:
PDF, 1.00 MB
english, 2005