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SPIE Proceedings [SPIE Microelectronic Manufacturing - Santa Clara, CA (Sunday 20 September 1998)] Microelectronic Device Technology II - Optimized shallow trench isolation for sub-0.18-μm ASIC technologies
Nouri, Faran, Laparra, Olivier, Sur, Harlan, Saha, Samar K., Pramanik, Dipankar, Manley, Martin, Burnett, David, Wristers, Dirk, Tsuchiya, ToshiakiVolume:
3506
Year:
1998
Language:
english
DOI:
10.1117/12.323962
File:
PDF, 2.32 MB
english, 1998