[IEEE 2016 IEEE International Memory Workshop (IMW) - Paris, France (2016.5.15-2016.5.18)] 2016 IEEE 8th International Memory Workshop (IMW) - Demonstration of Yield Improvement for On-Via MTJ Using a 2-Mbit 1T-1MTJ STT-MRAM Test Chip
Koike, Hiroki, Miura, Sadahiko, Honjo, Hiroaki, Watanabe, Toshinari, Sato, Hideo, Sato, Soshi, Nasuno, Takashi, Noguchi, Yasuo, Yasuhira, Mitsuo, Tanigawa, Takaho, Muraguchi, Masakazu, Niwa, Masaaki,Year:
2016
Language:
english
DOI:
10.1109/imw.2016.7495264
File:
PDF, 3.43 MB
english, 2016