Performance optimization of nanoscale junctionless...

Performance optimization of nanoscale junctionless transistors through varying device design parameters for ultra-low power logic applications

Roy, Debapriya, Biswas, Abhijit
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Volume:
97
Language:
english
Journal:
Superlattices and Microstructures
DOI:
10.1016/j.spmi.2016.06.015
Date:
September, 2016
File:
PDF, 2.15 MB
english, 2016
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