A fast processor for 3-d device simulation using systolic...

A fast processor for 3-d device simulation using systolic arrays

Takashi Naritomi, Hirotomo Aso, Masayuki Kimura
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Volume:
22
Year:
1991
Language:
english
Pages:
10
DOI:
10.1002/scj.4690220105
File:
PDF, 661 KB
english, 1991
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