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SPIE Proceedings [SPIE SPIE Advanced Lithography - San Jose, California, USA (Sunday 27 February 2011)] Design for Manufacturability through Design-Process Integration V - In-design DFM CMP flow for block level simulation using 32nm CMP model
Ha, Naya, Rieger, Michael L., Lee, Jinwoo, Paek, S. W., Kim, Kee Sup, Chen, Kuang Han, Gower-Hall, Aaron, Gbondo-Tugbawa, Tamba, Hurat, PhilippeVolume:
7974
Year:
2011
Language:
english
DOI:
10.1117/12.880899
File:
PDF, 634 KB
english, 2011