On-chip power-combining techniques for watt-level linear...

On-chip power-combining techniques for watt-level linear power amplifiers in 0.18 μm CMOS

Ren, Zhixiong, Zhang, Kefeng, Liu, Lanqi, Li, Cong, Chen, Xiaofei, Liu, Dongsheng, Liu, Zhenglin, Zou, Xuecheng
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Volume:
36
Language:
english
Journal:
Journal of Semiconductors
DOI:
10.1088/1674-4926/36/9/095002
Date:
September, 2015
File:
PDF, 7.58 MB
english, 2015
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