SPIE Proceedings [SPIE Microlithography 2003 - Santa Clara, CA (Sunday 23 February 2003)] Metrology, Inspection, and Process Control for Microlithography XVII - Use of silicon-versus-layout verification (SiVL) in process control of wafer lithography and mask-making metrology
van Adrichem, Paul J. M., Driessen, Frank A. J. M., van Hasselt, Kees, Herr, Daniel J.Volume:
5038
Year:
2003
Language:
english
DOI:
10.1117/12.485001
File:
PDF, 194 KB
english, 2003