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[IEEE 2016 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu, Taiwan (2016.4.25-2016.4.27)] 2016 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - A 2.5-bit/cycle 10-bit 160-MS/s SAR ADC in 90-nm CMOS process
Lee, Chia-Hsin, Hou, Chih-Huei, Huang, Chun-Po, Chang, Soon-Jyh, Hsieh, Yuan-Ta, Juang, Ying-ZongYear:
2016
Language:
english
DOI:
10.1109/VLSI-DAT.2016.7482525
File:
PDF, 260 KB
english, 2016