SPIE Proceedings [SPIE SPIE Advanced Lithography - San Jose, California (Sunday 21 February 2010)] Design for Manufacturability through Design-Process Integration IV - 45nm transistor variability study for memory characterization
Qian, Kun, Rieger, Michael L., Thiele, Joerg, Spanos, Costas J.Volume:
7641
Year:
2010
Language:
english
DOI:
10.1117/12.846704
File:
PDF, 3.08 MB
english, 2010