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SPIE Proceedings [SPIE SPIE Advanced Lithography - San Jose, California (Sunday 12 February 2012)] Design for Manufacturability through Design-Process Integration VI - Local loops for robust inter-layer routing at sub-20 nm nodes
Huang, Wenbin, Morris, Daniel, Lafferty, Neal, Liebmann, Lars, Vaidyanathan, Kaushik, Lai, Kafai, Pileggi, Larry, Strojwas, Andrzej J., Mason, Mark E.Volume:
8327
Year:
2012
Language:
english
DOI:
10.1117/12.916290
File:
PDF, 1.75 MB
english, 2012