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SPIE Proceedings [SPIE SPIE Advanced Lithography - San Jose, California, USA (Sunday 24 February 2013)] Design for Manufacturability through Design-Process Integration VII - Post-routing back-end-of-line layout optimization for improved time-dependent dielectric breakdown reliability
Chan, Tuck-Boon, Kahng, Andrew B., Mason, Mark E., Sturtevant, John L.Volume:
8684
Year:
2013
Language:
english
DOI:
10.1117/12.2011645
File:
PDF, 554 KB
english, 2013