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SPIE Proceedings [SPIE Advanced Lithography - San Jose, CA (Sunday 25 February 2007)] Design for Manufacturability through Design-Process Integration - Prediction of interconnect delay variations using pattern matching
Chin, Eric Y., Wong, Alfred K. K., Singh, Vivek K., Holwill, Juliet A., Neureuther, Andrew R.Volume:
6521
Year:
2007
Language:
english
DOI:
10.1117/12.712257
File:
PDF, 410 KB
english, 2007