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[IEEE 2016 IEEE 20th Workshop on Signal and Power Integrity (SPI) - Turin, Italy (2016.5.8-2016.5.11)] 2016 IEEE 20th Workshop on Signal and Power Integrity (SPI) - High-speed flip chip package Co-Design with Optimization of anti-pad size variations on metal plane layout
Lim, HoJeong, Yang, JeongKyu, Ku, HeeYeon, Ahn, ChongGeun, Lee, TaeYong, Kim, ByongJin, Chung, JiYongYear:
2016
Language:
english
DOI:
10.1109/sapiw.2016.7496256
File:
PDF, 998 KB
english, 2016